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Design tollerante alle variazioni a bassa potenza in silicio nanometrico di Swarup Bhunia (inglese-
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Numero oggetto eBay:395161377762
Specifiche dell'oggetto
- Condizione
- ISBN-13
- 9781441974174
- Book Title
- Low-Power Variation-Tolerant Design in Nanometer Silicon
- ISBN
- 9781441974174
- Subject Area
- Computers, Technology & Engineering
- Publication Name
- Low-Power Variation-Tolerant Design in Nanometer Silicon
- Publisher
- Springer
- Item Length
- 9.3 in
- Subject
- Electronics / Circuits / Integrated, Cad-Cam, Electronics / Circuits / General
- Publication Year
- 2010
- Type
- Textbook
- Format
- Hardcover
- Language
- English
- Item Weight
- 63.5 Oz
- Item Width
- 6.1 in
- Number of Pages
- Xv, 440 Pages
Informazioni su questo prodotto
Product Identifiers
Publisher
Springer
ISBN-10
1441974172
ISBN-13
9781441974174
eBay Product ID (ePID)
99561711
Product Key Features
Number of Pages
Xv, 440 Pages
Publication Name
Low-Power Variation-Tolerant Design in Nanometer Silicon
Language
English
Publication Year
2010
Subject
Electronics / Circuits / Integrated, Cad-Cam, Electronics / Circuits / General
Type
Textbook
Subject Area
Computers, Technology & Engineering
Format
Hardcover
Dimensions
Item Weight
63.5 Oz
Item Length
9.3 in
Item Width
6.1 in
Additional Product Features
Intended Audience
Scholarly & Professional
Number of Volumes
1 vol.
Illustrated
Yes
Table Of Content
Introduction and Motivation.- Background on Power Dissipation.- Background on Parameter Variations.- Low power Logic Design under Variations.- Low Power Memory Design under Variations.- System and Architecture Level Design.- Emerging Challenges and Solution Approach.- Conclusion and Discussion.
Synopsis
Design considerations for low-power operations and robustness with respect to variations typically impose contradictory requirements. This book focuses on circuit/architectural design techniques for achieving low power operation under parameter variations., Design considerations for low-power operations and robustness with respect to variations typically impose contradictory requirements. Low-power design techniques such as voltage scaling, dual-threshold assignment and gate sizing can have large negative impact on parametric yield under process variations. This book focuses on circuit/architectural design techniques for achieving low power operation under parameter variations. We consider both logic and memory design aspects and cover modeling and analysis, as well as design methodology to achieve simultaneously low power and variation tolerance, while minimizing design overhead. This book will discuss current industrial practices and emerging challenges at future technology nodes., Introduction and Motivation.- Background on Power Dissipation.- Background on Parameter Variations.- Low power Logic Design under Variations.- Low Power Memory Design under Variations.- System and Architecture Level Design.- Emerging Challenges and Solution Approach.- Conclusion and Discussion.
LC Classification Number
TK7867-7867.5
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- l***c (227)- Feedback lasciato dall'acquirente.Mese scorsoAcquisto verificatoBook came packaged well to avoid damage, in great condition. Not sure if the seller delayed shipping or if usps didn’t update the shipping, which is highly likely. Still received and we are happy with our purchase. I had trouble looking up tracking due to the company they used but seller found usps tracking and sent that over quickly. Sellers communication was excellent. Would buy from again. Item as described.
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