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Product Identifiers

PublisherWiley & Sons, Incorporated, John

ISBN-100471429767

ISBN-139780471429760

eBay Product ID (ePID)2302156

Product Key Features

Number of Pages336 Pages

Publication NameVerilog Coding for Logic Synthesis

LanguageEnglish

Publication Year2003

SubjectElectronics / Circuits / Logic, Electronics / Circuits / Vlsi & Ulsi, Electronics / Digital, Logic Design

TypeTextbook

AuthorWeng Fook Lee

Subject AreaComputers, Technology & Engineering

FormatHardcover

Dimensions

Item Height0.8 in

Item Weight21.1 Oz

Item Length9.4 in

Item Width6.4 in

Additional Product Features

Intended AudienceScholarly & Professional

LCCN2002-032433

Dewey Edition21

IllustratedYes

Dewey Decimal621.39/5

Table Of ContentTable of Figures. Table of Examples. List of Tables. Preface. Acknowledgments. Trademarks. Introduction. Asic Design Flow. Verilog Coding. Coding Style: Best-Known Method for Synthesis. Design Example of Programmable Timer. Design Example of Programmable Logic Block for Peripheral Interface.

SynopsisProvides a practical approach to Verilog design and problem solving. * Bulk of the book deals with practical design problems that design engineers solve on a daily basis. * Includes over 90 design examples. * There are 3 full scale design examples that include specification, architectural definition, micro-architectural definition, RTL coding, testbench coding and verification. * Book is suitable for use as a textbook in EE departments that have VLSI courses, Verilog is a Hardware Description Language (HDL) used to design and document electronic systems. Verilog HDL allows designers to virtually design systems without expending time or resources on physical models. It is the most widely used HDL with a user community of more than 50,000 active designers., A practical introduction to writing synthesizable Verilog code Rapid change in IC chip complexity and the pressure to design more complex IC chips at a faster pace has forced design engineers to find a more efficient and productive method to create schematics with large amounts of logic gates. This has led to the development of Verilog; one of the two types of Hardware Description Language (HDL) currently used in the industry. Verilog Coding for Logic Synthesis is a practical text that has been written specifically for students and engineers who are interested in learning how to write synthesizable Verilog code. Starting with simple verilog coding and progressing to complex real-life design examples, Verilog Coding for Logic Synthesis prepares you for a variety of situations that are bound to occur while utilizing Verilog. Expert design engineer Weng Fook Lee: Introduces the usage of Verilog and VHDL Describes a design flow for ASIC design Discusses basic concepts of Verilog coding Explores the common practices and coding style that are used when coding for synthesis and shows you the common coding style on Verilog operators Explains how a design project of a programmable timer is implemented Reveals the design of a programmable logic block for peripheral interface Filled with practical advice, functional flowcharts and waveforms, and over ninety examples, Verilog Coding for Logic Synthesis will help you fully understand the concepts and coding style of important industry language.

LC Classification NumberTK7868.D5L42 2003