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Dettagli su  2 pcs - HCPL 7520 Isolated Linear Sensing IC good x Arduino

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Agilent HCPL-7520 Isolated Linear Sensing IC Data Sheet

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Description

The HCPL-7520 isolated linear current sensing IC family is designed for current sensing in low-power electronic motor drives. In a typical implementation, motor current flows through an external resistor and the resulting analog voltage drop is sensed by the HCPL-7520. An output voltage is created on the other side of the HCPL-7520 optical isolation barrier. This single- ended output voltage is proportional to the motor current. Since common-mode voltage swings of several hundred volts in tens of nanoseconds are common in modern switching inverter motor drives, the HCPL-7520 was designed to ignore very high common-mode transient slew rates (of at least 10 kV/ μs).

The high CMR capability of the HCPL-7520 isolation amplifier provides the precision and stability needed to accurately monitor motor current in high noise motor control environ- ments, providing for smoother control (less “torque ripple”)

in various types of motor control applications.

Functional Diagram

VDD1 page1image18280 page1image18480 page1image18680VDD2 VIN+ page1image19080 page1image19280 page1image19480VOUT

VIN– page1image20000 page1image20200 page1image20400VREF GND1 GND2

Features

• 15 kV/μs common-mode rejection atVcm=1000V

• Compact, auto-insertable 8-pin DIP package

• 60 ppm/°C gain drift vs. temperature

• –0.6 mV input offset voltage

• 8 μV/°C input offset voltage vs. temperature

• 100 kHz bandwidth

• 0.06% nonlinearity, single-ended amplifier output for low power application.

page1image25128

IDD1

IDD2

page1image26088 page1image26512

1

page1image27120 page1image27544 page1image27704

2

+ –

SHIELD

+ –

page1image29656 page1image30080 page1image30504

3

page1image31376 page1image31536 page1image31696

4

The product can also be used
for general analog signal
isolation applications. For
general applications, we
recommend the HCPL-7520
(gain tolerance of ±5%). The
HCPL-7520 utilizes sigma
delta (
Σ−∆) analog-to-digital
converter technology to
Applications delivery offset and gain

accuracy and stability over time and temperature. This performance is delivered in a compact, auto-insert, 8-pin DIP package that meets worldwide regulatory safety standards. (A gull-wing surface mount option #300 is also available).

• Low-power inverter current sensing

• Motor phase and rail current sensing

• Switched mode power supply signal isolation

• General purpose low-power current sensing and monitoring

• General purpose analog signal isolation

CAUTION: It is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and /or degradation which may be induced by ESD.

8

7

6

5

• Worldwide safety approval:
UL 1577 (3750 Vrms/1 min.), CSA and IEC/EN/DIN EN 60747-5-2 (Option 060 only)

• Advanced sigma-delta (Σ−∆) A/D converter technology

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Ordering Information

Specify part number followed by option number (if desired).

Example: HCPL-7520-XXXX

page2image2792 page2image3888

Package Outline Drawings HCPL-7520 Standard DIP Package

No option = Standard DIP package, 50 per tube.
300 = Gull Wing Surface Mount Option, 50 per tube. 500 = Tape and Reel Packaging Option.
060 = IEC/EN/DIN EN 60747-5-2.
XXXE = Lead Free Option

page2image7104 page2image7528

9.80 ± 0.25 (0.386 ± 0.010)

85

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7

6

page2image10712

A 7520 YYWW

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1

DATE CODE

4 7.62 ± 0.25 (0.300 ± 0.010)

2

3

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1.19 (0.047) MAX.

3.56 ± 0.13 (0.140 ± 0.005)

1.080 ± 0.320 (0.043 ± 0.013)

1.78 (0.070) MAX.

4.70 (0.185) MAX.

0.51 (0.020) MIN. 2.92 (0.115) MIN.

0.65 (0.025) MAX.

2.54 ± 0.25 (0.100 ± 0.010)

6.35 ± 0.25 (0.250 ± 0.010)

5 TYP.

0.20 (0.008) 0.33 (0.013)

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2

DIMENSIONS IN MILLIMETERS AND (INCHES).
NOTE: FLOATING LEAD PROTUSION IS 0.5 mm (20 mils) MAX.

HCPL-7520 Gull Wing Surface Mount Option 300 Outline Drawing

9.80 ± 0.25 (0.386 ± 0.010)

8765

1234

Land Pattern Recommendation

page3image3712 page3image3872 page3image4032 page3image4192 page3image4352 page3image4512
page3image5208 page3image5368

1.016 (0.040)

page3image6016 page3image6176 page3image6336 page3image6496 page3image6656 page3image6816 page3image6976 page3image7136 page3image7296 page3image7456 page3image7880

10.9 (0.430)

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1.27 (0.050) 2.0 (0.080)

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1.19 (0.047) MAX.

1.080 ± 0.320 (0.043 ± 0.013)

6.350 ± 0.25 (0.250 ± 0.010)

1.780 (0.070) MAX.

3.56 ± 0.13 (0.140 ± 0.005)

9.65 ± 0.25 (0.380 ± 0.010)

7.62 ± 0.25 (0.300 ± 0.010)

0.635 ± 0.25 (0.025 ± 0.010)

0.20 (0.008) 0.33 (0.013)

12 NOM.

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2.54 (0.100) BSC

0.635 ± 0.130 (0.025 ± 0.005)

page3image40288 page3image40448 page3image40608 page3image41032 page3image41456 page3image41616

3

A 7520 YYWW

DIMENSIONS IN MILLIMETERS (INCHES). TOLERANCES (UNLESS OTHERWISE SPECIFIED):

NOTE: FLOATING LEAD PROTUSION IS 0.5 mm (20 mils) MAX.

xx.xx = 0.01 xx.xxx = 0.005

LEAD COPLANARITY MAXIMUM: 0.102 (0.004)

TEMPERATURE ( ̊C) TEMPERATURE ( ̊C)

Solder Reflow Temperature Profile

300

200

100

0
0 50 100 150 200 250

page4image4104

PREHEATING RATE 3 ̊C + 1 ̊C/–0.5 ̊C/SEC. REFLOW HEATING RATE 2.5 ̊C ± 0.5 ̊C/SEC.

page4image5216

PEAK TEMP. 245 ̊C

PEAK TEMP. 240 ̊C

page4image6848 page4image7008

PEAK TEMP. 230 ̊C

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2.5 ̊C ± 0.5 ̊C/SEC.

3 ̊C + 1 ̊C/–0.5 ̊C

page4image9832 page4image10256 page4image10416

160 ̊C 150 ̊C 140 ̊C

30 SEC.

30 SEC.

SOLDERING TIME 200 ̊C

page4image12944 page4image13104 page4image13264 page4image13424 page4image13584 page4image13744 page4image13904 page4image14064 page4image14224 page4image14384

PREHEATING TIME 150 ̊C, 90 + 30 SEC.

page4image15336 page4image15496 page4image15656

50 SEC.

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TIGHT TYPICAL LOOSE

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ROOM TEMPERATURE

Recommended Pb-Free IR Profile

TIME (SECONDS)

TIME WITHIN 5 ̊C of ACTUAL PEAK TEMPERATURE

tp
20-40 SEC.

RAMP-DOWN 6 ̊C/SEC. MAX.

60 to 150 SEC.

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Tp TL

Tsmax Tsmin

25

260 +0/-5 ̊C

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217 ̊C

page4image35880

RAMP-UP 3 ̊C/SEC. MAX.

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150-200 ̊C

ts PREHEAT 60 to 180 SEC.

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page4image41288

tL

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t25 ̊CtoPEAK
TIME (SECONDS)

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4

NOTES:
THE TIME FROM 25 ̊C to PEAK TEMPERATURE = 8 MINUTES MAX. T
smax = 200 ̊C, Tsmin = 150 ̊C

Regulatory Information

The HCPL-7520 has been approved by the following organizations:

IEC/EN/DIN EN 60747-5-2

Approved under:
IEC 60747-5-2:1997 + A1:2002
EN 60747-5-2:2001 + A1:2002
DIN EN 60747-5-2 (VDE 0884 Teil 2):2003-01.

IEC/EN/DIN EN 60747-5-2 Insulation Characteristics[1]

Description

Installation classification per DIN EN 0110-1/1997-04, Table 1 for rated mains voltage - 150 Vrms
for rated mains voltage - 300 Vrms
for rated mains voltage - 600 Vrms

Climatic Classification

Pollution Degree (DIN EN 0110-1/1997-04)

Maximum Working Insulation Voltage

Input to Output Test Voltage, Method b[2]
VIORM x 1.875 = VPR, 100% production test with tm = 1 sec, partial discharge <5 pC

Input to Output Test Voltage, Method a[2]
VIORM x 1.5 = VPR, type and sample test, tm = 60 sec, partial discharge <5 pC

Highest Allowable Overvoltage (transient overvoltage tini = 10 sec)

Safety-limiting values – maximum values allowed in the event of a failure. Case Temperature
Input Current
[3]
Output Power[3]

Symbol

Characteristic Unit

I–IV I–III I–II

55/100/21

UL

Approved under UL 1577, component recognition program up to VISO = 3750 VRMS. File E55361.

CSA

Approved under CSA Component Acceptance Notice #5, File CA 88324.

page5image15280 page5image15440 page5image15600 page5image15760

2
VIORM 891 Vpeak

VPR 1670 Vpeak

VPR 1336 Vpeak VIOTM 6000 Vpeak

TS 175 °C IS, INPUT 400 mA PS, OUTPUT 600 mW

page5image18352 page5image18512 page5image18672 page5image18832 page5image18992 page5image19152

Insulation Resistance at TS, VIO = 500 V RS

>109 Ω

page5image20472

Notes:
1. Insulation characteristics are guaranteed only within the safety maximum ratings which must be

800

700

page5image22352

PS (mW)

IS (mA)

page5image27488

ensured by protective circuits within the application. Surface Mount Classifications is Class A in
accordance with CECC00802.
600

2. Refer to the optocoupler section of the Isolation and Control Components Designer’s Catalog, under Product Safety Regulations section,
(IEC/EN/DIN EN 60747-5-2) for a detailed description of Method a and Method b partial discharge test profiles.

3. Refer to the following figure for dependence of PS and IS on ambient temperature.

500

400

300

200

100

0

5

75 100 125 150 175 200

0 25 50
T
S – CASE TEMPERATURE – C

OUTPUT POWER – PS, INPUT CURRENT – IS

Insulation and Safety Related Specifications

page6image1232

Parameter

Minimum External Air Gap (clearance)

Minimum External Tracking (creepage)

Minimum Internal Plastic Gap (internal clearance)

Tracking Resistance (comparative tracking index)

Isolation Group

Absolute Maximum Ratings

Parameter

Storage Temperature

Symbol

L(101)

L(102)

CTI

Value Unit

7.4 mm

8.0 mm 0.5 mm

>175 V IIIa

Symbol

TS

TA
VDD1_max, VDD1_max
VIN+, VIN-
VIN+, VIN-
VOUT
VREF
IREF
260°C for 10 sec., 1.6 mm below seating See Package Outline Drawings section

Conditions

Measured from input terminals to output terminals, shortest distance through air.

Measured from input terminals to output terminals, shortest distance path along body.

Through insulation distance conductor to conductor, usually the straight line distance thickness between the emitter and detector.

DIN IEC 112 Part 1
Material Group (DIN EN 0110-1/1997-04)

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Min.

–55

Max. Units Note

125 °C

100 °C 6 V VDD1 + 0.5- V VDD1 + 0.5- V VDD2 + 0.5- V VDD2 + 0.5- V 20- mA plane

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Operating Temperature
Supply Voltage
Steady-State Input Voltage
Two Second Transient Input Voltage Output Voltage

Reference Input Voltage Reference Input Current
Lead Solder Temperature
Solder Reflow Temperature Profile

Recommended Operating Conditions

Parameter

Operating Temperature

Supply Voltage
Input Voltage (accurate and linear) Input Voltage (functional) Reference Input Voltage

–40 0 –2.0 –6.0 –0.5 0.0

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Symbol

TA

VDD1, VDD2 VIN+, VIN- VIN+, VIN- VREF

Min. Max.

–40 85

4.5 5.5 –200 200 –2.0 2.0 4.0 VDD2

Units Note

°C

V mV V V

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6

Electrical Specifications (DC)

Unless otherwise noted, all typicals and figures are at the nominal operation conditions of VIN+ = 0 V,
V
IN- = 0 V, VREF = 4.0 V, VDD1 = VDD2 = 5.0 V and TA = 25°C; all Minimum/Maximum specifications are within the Recommended Operating Conditions.

page7image3360

Parameter

Input Offset Voltage

Magnitude of Input Offset Change vs. Temperature

Gain

Magnitude of Gain Change vs. Temperature

VOUT 200 mV Nonlinearity

Magnitude of VOUT 200 mV Nonlinearity Change
vs. Temperature

VOUT 100 mV Nonlinearity

Input Supply Current Output Supply Current

Reference Voltage Input Current

Input Current

Magnitude of Input Bias Current vs. Termperature Coefficient

Maximum Input Voltage before VOUT Clipping

Equivalent Input Impedance VOUT Output Impedance

Input DC Common-Mode Rejection Ratio

Symbol Min.

VOS –6

Vos/T
G V
REF/0.512

Test Conditions

VIN+ = 0 V

VREF/0.512 V/V
+5% <0.2V

Typ. Max. Units

–1 6 mV

8 20 μV/°C

Fig. Note

6 1

7
8 2

9
10 3,4 11

3,5

4

5

7

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–5%

-0.2 V < VIN+

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G/T NL200

|dNL200/dT|

NL100

IDD1 IDD2 IREF

IIN+ |dIIN/dT|

|VIN+|MAX

RIN
ROUT CMRRIN

60 300 ppm/°C 0.06 0.55 % 0.0004 %/°C

0.04 0.4 %

11.7 16 mA 9.9 16 mA 0.26 1 mA

–0.6 5 μA 0.45 nA/°C

256 mV 700 kΩ

15 Ω 63 dB

TA = 25°C

-0.2 V < VIN+ <0.2V

-0.2 V < VIN+ <0.2V

-0.2 V < VIN+ < 0.2 V

-0.1 V < VIN+ <0.1V

VIN+ =0V

1,2,3 1,2,3

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7

Switching Specifications (AC)

Over recommended operating conditions unless otherwise specified.

page8image1576

Parameter

VIN to VOUT Signal Delay (50 – 10%)

VIN to VOUT Signal Delay (50 – 50%) VIN to VOUT Signal Delay (50 – 90%) VOUT Rise Time (10 – 90%)
V
OUT Fall Time (10 – 90%)

Symbol Min. Typ. Max. Units Test Conditions

Fig. Note

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VOUT Bandwidth (-3 dB) VOUT Noise

Common Mode Transient Immunity

Package Characteristics

Parameter

Input-Output Momentary Withstand Voltage

Input-Output Resistance Input-Output Capacitance

Notes:

tPD10

tPD50 tPD90 tR
tF BW

NOUT CMTI

Symbol

VISO

RI-O CI-O

50 10

Min.

3750

2.2 4

3.4 5 5.2 9.9 3.0 7 3.2 7 100

31.5 15

Typ. Max.

>109 1.4

μs

μs
μs
μs
μs
kHz mVrms kV/μs

Units

Vrms

Ω

pF

VIN+ =0mVto200mVstep 13

VIN+ = 200 mVpk-pk 14 VIN+ = 0 V
T
A = 25°C, VCM = 1000 V 15

Test Conditions Fig. Note

page8image20184 page8image20344 page8image20504 page8image20664 page8image20824

TA = 25°C, RH < 50%

VI-O = 500 V Freq = 1 MHz

6

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General Note: Typical values were taken from a sample of nominal units operating at nominal conditions (VDD1 = VDD2 = 5 V, VREF = 4.0 V, Temperature = 25°C) unless otherwise stated. Nominal plots shown from Figure 1 to 11 represented the drift of these nominal units from their nominal operating conditions.

  1. InputOffsetVoltageisdefinedastheDCInputVoltagerequiredtoobtainanoutputvoltageofVREF/2.

  2. Gain is defined as the slope of the best-fit line of the output voltage vs. the differential input voltage (VIN+ - VIN-) over the specified input range. Gain

    is derived from VREF/512 mV; e.g. VREF = 5.0, gain will be 9.77 V/V.

  3. Nonlinearityisdefinedashalfofthepeak-to-peakoutputdeviationfromthebest-fitgainline,expressedasapercentageofthefull-scaleoutput

    voltage range.

  4. NL200isthenonlinearityspecifiedoveraninputvoltagerangeof±200mV.

  5. NL100isthenonlinearityspecifiedoveraninputvoltagerangeof±100mV.

  6. InaccordancewithUL1577,eachoptocouplerisprooftestedbyapplyinganinsulationtestvoltage•4500Vrmsfor1second(leakagedetectioncurrent

    limit, II-O < 5 μA). This test is performed before the 100% production test for the partial discharge (method b) shown in

    IEC/EN/DIN EN 60747-5-2 Insulation Characteristic Table, if applicable.

7. CMRR is defined as the ratio of the differential signal gain (signal applied differentially between pins 2 and 3) to the common-mode gain (input pins

tied together and the signal applied to both inputs at the same time), expressed in dB.

8

VOS – INPUT OFFSET CHANGE – mV

IIN – INPUT CURRENT – μA

IDD – SUPPLY CURRENT – mA

DGAIN – GAIN CHANGE – %

VO – OUTPUT VOLTAGE – V

IDD – SUPPLY CURRENT – mA

GAIN – GAIN CHANGE – %

VOS – INPUT OFFSET CHANGE – μV

IDD – SUPPLY CURRENT – mA

13

12 11 10

9

8
4.5 4.7 4.9 5.1 5.3 5.5

VDD – SUPPLY VOLTAGE – V

Figure 1. Supply current vs. supply voltage.

0.2 0 -0.2 -0.4 -0.6 -0.8 -1.0 -1.2 -1.4

-0.3 -0.2 -0.1 0 0.1 0.2 0.3 VIN – INPUT VOLTAGE – V

Figure 4. Input current vs. input voltage.

2.0 1.5 1.0 0.5

0

-0.5

-1.0

-1.5

-2.0
-40 -20 0 20 40 60 80 100

TA – TEMPERATURE – C

Figure 7. Input offset change vs. temperature.

11.0 10.5 10.0

9.5 9.0 8.5 8.0 7.5 7.0

-40 -20 0 20 40 60 80 100 TA – TEMPERATURE – C

Figure 2. Supply current vs. temperature.

4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5

0
-0.3 -0.2 -0.1 0 0.1 0.2 0.3

12.0 11.0 10.0

9.0 8.0 7.0 6.0 5.0 4.0

-0.3 -0.2 -0.1 0 0.1 0.2 0.3 VIN – INPUT VOLTAGE – V

Figure 3. Supply current vs. input voltage.

page9image22672

IDD1

IDD2

page9image30296 page9image30456
page9image31864

IDD1

IDD2

page9image40344 page9image40504
page9image42120 page9image44056

IDD1

IDD2

page9image44920 page9image45080

2.5

2.0

1.5 1.0 0.5

0

-0.5 -1.0 -1.5 -2.0

4.5

4.7 4.9 5.1 5.3 5.5 VDD – SUPPLY VOLTAGE – V

page9image48544 page9image50984 page9image53424

VDD1

VDD2

page9image58440 page9image58600

VIN – INPUT VOLTAGE – V

Figure 5. Output voltage vs. input voltage.

Figure 6. Input offset change vs. supply voltage.

0.7 0.6 0.5 0.4 0.3 0.2 0.1

0

-0.1 -0.2 -0.3

-40 -20 0 20 40 60 80 100 TA – TEMPERATURE – C

0.020 0.015 0.010 0.005

0

-0.005

-0.010 4.5

4.7
V
DD – SUPPLY VOLTAGE – V

page9image69632

TYPICAL

MAXIMUM

page9image75000
page9image79944 page9image82888 page9image84992

9

Figure 8. Gain change vs. supply voltage.

Figure 9. Gain change vs. temperature.

4.9

5.1

5.3

5.5

VDD1

VDD2

page9image89048 page9image89208

0.050

0.09

page10image2072 page10image4008

0.048

0.046

0.044

0.042

0.040
4.5 4.7

5.3 5.5

0.08

0.07

0.06

0.05
-40 -20 0 20 40 60 80 100

TA – TEMPERATURE – C

Figure 11. Nonlinearity vs. temperature.

page10image10368 page10image10528 page10image10688 page10image10848 page10image11008

Tp5010

Tp5050 Tp5090 Trise

page10image16672 page10image16992
page10image18040

0.1 μF VIN

0.1 μF

4.9
V
DD – SUPPLY VOLTAGE – V

Figure 10. Nonlinearity vs. supply voltage.

VDD1

VDD2

0.1 μF VOUT

VREF

5.1

page10image22320 page10image22744 page10image22904 page10image23064 page10image23488 page10image23648

18

6 5 4 3 2 1 0

-40 -20 0 20 40 60 80 100 TA – TEMPERATURE – C

Figure 13. Propagation delay vs. temperature.

page10image29384 page10image29544 page10image29968 page10image30128 page10image30288 page10image30448 page10image30608 page10image30768 page10image30928 page10image31088 page10image31248 page10image31408 page10image31568 page10image31992

4

5

page10image33048 page10image33208 page10image33368 page10image33528 page10image33688 page10image33848 page10image34008 page10image34168 page10image34328 page10image34488 page10image34648

Figure 12. Propagation delay test circuit.

1

0 -1 -2 -3 -4 -5 -6

0.1 1.0 10.0 100.0 FREQUENCY – kHz

Figure 14. Bandwidth.

78L05

VDD2 18

page10image38616 page10image39040 page10image39200

IN OUT

page10image39848 page10image40008 page10image40168 page10image40592 page10image40752 page10image40912 page10image41072 page10image41232 page10image41392

0.1 μF

9V

0.1 μF

page10image42992 page10image44928 page10image45088 page10image45248 page10image45408 page10image45568 page10image45728

2

7

0.1 μF VOUT

VREF

page10image47672 page10image47832 page10image47992 page10image48152 page10image48312 page10image48472 page10image48632 page10image48792 page10image48952 page10image49112

3

HCPL-7520

6

page10image50880 page10image51040 page10image51200 page10image51360

4

5

page10image52416 page10image52576 page10image52736 page10image52896 page10image53056 page10image53216

PULSE GEN.

page10image53864 page10image54024

10

2

VDD1

VDD2

1000.0

+– VCM

7

page10image57176

3

HCPL-7520

6

Figure 15. CMTI test circuit.

GAIN – dB

NL – NONLINEARITY – %

TPD – PROPAGATION DELAY – μs

NL – NONLINEARITY – %

Application Information

Power Supplies and Bypassing

The recommended supply connections are shown in Figure 16. A floating power supply (which in many applications could be the same supply that is used to drive the high-side power transistor) is regulated to 5 V using a simple zener diode (D1); the value of resistor R4 should be chosen to supply sufficient current from the existing floating supply. The voltage from the current sensing resistor (Rsense) is applied to the input of the HCPL-7520 through an RC anti-aliasing filter (R2 and C2). Although

the application circuit is relatively simple, a few recom- mendations should be followed to ensure optimal
performance.

The power supply for the HCPL -7520 is most often obtained from the same supply used to power the power transistor gate drive circuit. If a dedicated supply is required, in many cases it is possible to add an additional winding on an existing transformer. Otherwise, some sort of simple isolated supply can be used, such as a line powered transformer or a high- frequency DC-DC converter.

R4

D1
5.1 V page11image13584 page11image137841

An inexpensive 78L05 three- terminal regulator can also be used to reduce the floating supply voltage to 5 V. To help attenuate high- frequency power supply noise or ripple, a resistor or inductor can be used in series with the input of the regulator to form a low-pass filter with the regulator’s input bypass capacitor.

HV+

page11image18072 page11image18232 page11image18392 page11image18552 page11image18712 page11image18872 page11image19032 page11image19192 page11image19352 page11image19512 page11image19672 page11image19832 page11image19992 page11image20416 page11image20576 page11image20736 page11image20896 page11image21056 page11image21216

C1 0.1 μF

page11image22008 page11image22168 page11image22328 page11image22488 page11image22648 page11image23408 page11image23568 page11image23728 page11image23888 page11image24048

MOTOR

+ R1 - RSENSE

R2

39Ω C2 0.01 μF

2 3 4

page11image26704 page11image26864 page11image27288 page11image27448 page11image27608 page11image27768 page11image27928 page11image28088 page11image28248 page11image28408 page11image28568 page11image28728 page11image28888 page11image29048 page11image29208 page11image29368 page11image29528 page11image29688 page11image29848 page11image30008 page11image30168 page11image30328 page11image30488 page11image30912 page11image31072

11

HV-

Figure 16. Recommended supply and sense resistor connections.

+

FLOATING POSITIVE SUPPLY

-

page11image34104

GATE DRIVE CIRCUIT

page11image34896 page11image35056 page11image35216 page11image35376 page11image35536 page11image35696 page11image35856

VDD1 VIN+ VIN- GND1

HCPL-7510

page11image37248 page11image37408

As shown in Figure 17, 0.1 μF bypass capacitors (C1, C2) should be located as close as possible to the pins of the HCPL-7520. The bypass capacitors are required because of the high-speed digital nature of the signals inside the HCPL-7520. A 0.01 μF bypass capacitor (C2) is also recommended at the input due to the switched- capacitor nature of the input circuit. The input bypass capacitor also forms part of the anti-aliasing filter, which is recommended to prevent high frequency noise from

aliasing down to lower frequencies and interfering with the input signal. The input filter also performs an important reliability function— it reduces transient spikes from ESD events flowing through the current sensing resistor.

PC Board Layout

The design of the printed circuit board (PCB) should follow good layout practices, such as keeping bypass capacitors close to the supply pins, keeping output signals away from input signals, the

use of ground and power planes, etc. In addition, the layout of the PCB can also affect the isolation transient immunity (CMTI) of the HCPL-7520, due primarily to stray capacitive coupling between the input and the output circuits. To obtain optimal CMTI performance, the layout of the PC board should minimize any stray coupling

by maintaining the maximum possible distance between the input and output sides of the circuit and ensuring that any ground or power plane on the

page12image16656

HV+

FLOATING POSITIVE SUPPLY

U1 78L05

page12image18832 page12image19152 page12image19312 page12image19632 page12image19952 page12image20112 page12image20272 page12image20432 page12image20752

+5 V

μC

page12image21912 page12image22072 page12image22232 page12image22552 page12image22712 page12image22872 page12image23032 page12image23192 page12image23352 page12image23512 page12image23672 page12image23992 page12image24152 page12image24312 page12image24472 page12image24632 page12image24792 page12image25376 page12image25536 page12image25696 page12image25856

MOTOR

+ R1 - RSENSE

HV-

VREF 4 5 GND

page12image28032 page12image28192 page12image28352 page12image28512 page12image28672 page12image28832 page12image28992 page12image29152

GATE DRIVE CIRCUIT

IN OUT

page12image31336

C2 0.1 μF

1

page12image32480 page12image32800

C1 0.1 μF

R5 68Ω

C3 0.01 μF

2

3

VDD1 VDD2 VIN+ VOUT

VIN- VREF GND1 GND2

8

page12image37472

7

6

A/D

page12image38976 page12image39136 page12image39296

C4

C5

C6

page12image40800 page12image40960 page12image41120
page12image41440 page12image41600 page12image41760 page12image41920 page12image42080 page12image42240 page12image42400 page12image42560 page12image42720 page12image42880 page12image43040 page12image43200 page12image43360 page12image43520 page12image43680 page12image43840 page12image44000

HCPL-7520

C6 = 150 pF
C4 = C5 = 0.1 μF

page12image45944 page12image46704 page12image46864 page12image47024 page12image47184 page12image47344 page12image47504 page12image47664

Figure 17. Recommended HCPL-7520 application circuit.

12

Current Sensing Resistors

The current sensing resistor should have low resistance (to minimize power dissipation), low inductance (to minimize di/dt induced voltage spikes which could adversely affect operation), and reasonable tolerance (to maintain overall circuit accuracy). Choosing a particular value for the resistor is usually a compromise between minimizing power dissipation and maximizing accuracy. Smaller sense resistance decreases power dissipation, while larger sense resistance can improve circuit accuracy by utilizing the full input range of the HCPL -7520.

The first step in selecting a sense resistor is determining how much current the resistor will be sensing. The graph in Figure 18 shows the RMS current in each phase of a three-phase induction motor as a function of average motor output power (in horsepower, hp) and motor drive supply voltage. The maximum value

of the sense resistor is determined by the current being measured and the maximum recommended input voltage of the isolation amplifier. The maximum sense resistance can be calculated by taking the maximum recommended input voltage and dividing by the peak current that the sense resistor should see during normal operation. For example, if a motor will have a maximum RMS current of 10 A and can experience up to 50% overloads during normal operation, then the peak current is 21.1 A (=10 x 1.414 x 1.5). Assuming a maximum input voltage of 200 mV, the maximum value of sense

resistance in this case would be about 10 mΩ. The maximum average power dissipation in the sense resistor can also be easily calculated by multiplying the sense resistance times the square of the maximum RMS current, which is about 1 W in the previous example. If the power dissipation in the sense resistor is too high, the resistance can be decreased below the maximum value to decrease power dissipation. The minimum value of the sense resistor is limited by precision and accuracy requirements of the design. As the resistance value is reduced, the output voltage across the resistor is also reduced, which means that the offset and noise, which are fixed, become a larger percentage of the signal amplitude. The selected value of the sense resistor will fall somewhere between the minimum and maximum values, depending on the particular requirements of a specific design.

When sensing currents large enough to cause significant heating of the sense resistor, the temperature coefficient (tempco) of the resistor can introduce nonlinearity due to the signal dependent temperature rise of the resistor. The effect increases
as the resistor-to-ambient thermal resistance increases. This effect can be minimized by reducing the thermal resistance of the current sensing resistor or by using a resistor with a lower tempco. Lowering the thermal resistance can be accomplished by repositioning the current sensing resistor on the PC board, by using larger PC

board traces to carry away more heat, or by using a heat sink. For a two-terminal current sensing resistor, as the value of resistance decreases, the resistance of the leads become a significant percentage of the total resistance. This has two primary effects on resistor accuracy. First, the effective resistance of the sense resistor can become dependent on factors such as how long the leads are, how they are bent, how far they are inserted into the board, and how far solder wicks up the leads during assembly (these issues will be discussed in more detail shortly). Second, the leads are typically made from a material, such as copper, which has a much higher tempco than the material from which the resistive element itself is made, resulting in a higher tempco overall. Both of these effects are eliminated when a four-terminal current sensing resistor is used. A four-terminal resistor has two additional terminals that are Kelvin-connected directly across the resistive element itself; these two terminals are used to monitor the voltage across the resistive element while the other two terminals are used to carry the load current. Because of the Kelvin connection, any voltage drops across the leads carrying the load current should have no impact on the measured voltage.

13

40

35

30 25 20 15 10

5
00 5 10 15 20 25 30 35

MOTOR PHASE CURRENT – A (rms)

Figure 18. Motor output horsepower vs. motor phase current and supply voltage.

When laying out a PC board for the current sensing resistors, a couple of points should be kept in mind. The Kelvin connections to the resistor should be brought together under the body of the resistor and then run very close to each other to the input of the HCPL-7520; this minimizes the loop area of the connection and reduces the possibility of stray magnetic fields from interfering with the measured signal. If the sense resistor is not located on the same PC board as the HCPL- 7520 circuit, a tightly twisted pair of wires can accomplish the same thing. Also, multiple layers of the PC board can be used to increase current

carrying capacity. Numerous plated-through vias should surround each non-Kelvin terminal of the sense resistor to help distribute the current between the layers of the PC board. The PC board should use 2 or 4 oz. copper for the layers, resulting in a current carrying capacity in excess of 20 A. Making the current carrying traces on the PC board fairly large can also improve the sense resistor’s power dissipation capability by acting as a heat sink. Liberal use of vias where the load current enters and exits the PC board is also recommended.

Sense Resistor Connections

The recommended method for connecting the HCPL-7520 to the current sensing resistor is shown in Figure 17. VIN+ (pin 2 of the HPCL-7520) is connected to the positive terminal of the sense resistor, while VIN- (pin 3) is shorted to GND1 (pin 4), with the powersupply return path functioning as the sense line to the negative terminal of the current sense resistor. This allows a single pair of wires or PC board traces to connect

the HCPL-7520 circuit to the sense resistor. By referencing the input circuit to the negative side of the sense resistor, any load current induced noise transients on the resistor are seen as a common- mode signal and will not interfere with the current- sense signal. This is important because the large load
currents flowing through the motor drive, along with the parasitic inductances inherent in the wiring of the circuit, can generate both noise spikes and offsets that are relatively large compared to the small voltages that are being measured across the current sensing resistor. If the same power supply is used both for the gate drive circuit and for the current sensing circuit, it is very important that the connection from GND1 of the HCPL-7520 to the sense resistor be the only return path for supply current to the gate drive power supply in order to eliminate potential ground loop problems. The only direct connection between the HCPL-7520 circuit and the gate drive circuit should be the positive power supply line.

page14image32640

440 380 220 120

page14image37912

14

MOTOR OUTPUT POWER – HORSEPOWER

FREQUENTLY ASKED QUESTIONS ABOUT THE HCPL-7520

1. THE BASICS

1.1: Why should I use the HCPL-7520 for sensing current when Hall-effect sensors are available which don’t need an isolated supply voltage?

Available in an auto-insertable, 8-pin DIP package, the HCPL-7520 is smaller than and has better linearity, offset vs. temperature and Common Mode Rejection (CMR) performance than most Hall- effect sensors. Additionally, often the required input-side power supply can be derived from the same supply that powers the gate-drive optocoupler.

2. SENSE RESISTOR AND INPUT FILTER
2.1: Where do I get 10 m
Ω resistors? I have never seen one that low.

Although less common than values above 10 Ω, there are quite a few manufacturers of resistors suitable for measuring currents up to 50 A when combined with the HCPL-7520. Example product information may be found at Dale’s web site (http://www.vishay.com/vishay/dale) and Isotek’s web site (http://www.isotekcorp.com) and Iwaki Musen Kenkyusho’s website (http:// www.iwakimusen.co.jp) and Micron Electric’s website (http://www.micron-e.co.jp).

2.2: Should I connect both inputs across the sense resistor instead of grounding VIN- directly to pin 4?

This is not necessary, but it will work. If you do, be sure to use an RC filter on both pin 2 (VIN+) and pin 3 (VIN-) to limit the input voltage at both pads.

2.3: Do I really need an RC filter on the input? What is it for? Are other values of R and C okay?

The input anti-aliasing filter (R=39 Ω, C=0.01 μF) shown in the typical application circuit is recommended for filtering fast switching voltage transients from the input signal. (This helps to attenuate higher signal frequencies which could otherwise alias with the input sampling rate and cause higher input offset voltage.)

Some issues to keep in mind using different filter resistors or capacitors are:

  1. (Filter resistor:) The equivalent input resistance for HCPL-7520 is around 700 kΩ. It is therefore best to ensure that the filter resistance is not a significant percentage of this value; otherwise the offset voltage will be increased through the resistor divider effect. [As an example, if Rfilt = 5.5 kΩ, then VOS = (Vin * 1%) = 2 mV for a maximum 200 mV input and VOS will vary with respect to Vin.]

  2. The input bandwidth is changed as a result of this different R-C filter configuration. In fact this is one of the main reasons for changing the input-filter R-C time constant.

  3. (Filter capacitance:) The input capacitance of the HCPL-7520 is approximately 1.5 pF. For proper operation the switching input-side sampling capacitors must be charged from a relatively fixed (low impedance) voltage source. Therefore, if a filter capacitor is used it is best for this capacitor to be a few orders of magnitude greater than the CINPUT (A value of at least 100 pF works well.)

2.4: How do I ensure that the HCPL-7520 is not destroyed as a result of short circuit conditions which cause voltage drops across the sense resistor that exceed the ratings of the HCPL-7520’s inputs?

Select the sense resistor so that it will have less than 5 V drop when short circuits occur. The only other requirement is to shut down the drive before the sense resistor is damaged or its solder joints melt. This ensures that the input of the HCPL-7520 can not be damaged by sense resistors going open-circuit.

3. ISOLATION AND INSULATION

3.1: How many volts will the HCPL-7520 withstand?

The momentary (1 minute) withstand voltage is 3750 V rms per UL 1577 and CSA Component Acceptance Notice #5.

15

4. ACCURACY

4.1: Does the gain change if the internal LED light output degrades with time?

No. The LED is used only to transmit a digital pattern. Agilent has accounted for LED degradation in the design of the product to ensure long life.

5. MISCELLANEOUS

5.1: How does the HCPL-7520 measure negative signals with only a +5 V supply?

The inputs have a series resistor for protection against large negative inputs. Normal signals are no more than 200 mV in amplitude. Such signals do not forward bias any junctions sufficiently to interfere with accurate operation of the switched capacitor input circuit. 

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